       ## Bistable Circuits

### Introduction

A Bistable is a digital circuit that has two inputs and a digital output. The SET input makes the output Logic 1 (HIGH) and the output will stay in this state until forced to change. The RESET input makes the output Logic 0 (LOW) and the output will also stay in this state until forced to change. The output of a Bistable circuit is stable in both states - it can remain as either Logic 1 or Logic 0 indefinitely until either the SET or RESET initiate a change of state. The name means that the circuit has two stable states.

The terms Bistable, Latch and Flip-Flop are sometimes used interchangeably to describe Bistable circuits. However, each of these terms does have a specific meaning. A bistable circuit is the most basic circuit with SET and RESET inputs and the output immediately responds to a change in the inputs. A latch is very similar to the basic bistable circuit but includes an ENABLE to control the state of the output. A flip-flop is a bistable circuit where the output changes on the rising (usually) edge of a clock pulse.

### Bistable Basics

A Bistable has two inputs called Set (S) and Reset (R). The output is called Q. There is often a second output which is the opposite of Q or, in logic terms, NOT Q. The NOT Q output is written as Q and pronounced "Q-bar" In the most common bistables, Set and Reset are usually LOW and must go HIGH to change the output. When SET goes HIGH, Q goes HIGH and Q goes LOW. Q and Q change on the rising edge of the SET input. Similarly, when RESET goes HIGH this makes Q LOW and Q HIGH

Note:
1. In normal operation, SET and RESET are usually both held LOW
2. Q is always the opposite of Q
3. SET and RESET should not both be high at the same time - if they are the state of the outputs is undecided. 4. There are also bistables where SET and RESET are usually HIGH and go LOW to change the output. The timing diagram shows how the SET and RESET inputs cause Q and Q to change

The first time SET (Red line) goes HIGH it makes the OUTPUT (Green line) go HIGH. Making the SET go HIGH again has no further effect - the OUTPUT stays HIGH.

Making the RESET (Blue line) go HIGH makes the OUTPUT go LOW. Making the RESET go HIGH again has no further effect - the OUTPUT stays LOW.

The SET and RESET pulses can be momentary pulse as shown by the final RESET pulse which is just a very narrow, short pulse.

A bistable is particularly useful in an alarm circuit where one input (the sensor or detector) will SET the alarm ringing and a different input (the security officers key) will RESET the alarm to silent.

### 4043 Bistable IC A basic bistable can be built from logic gates but is also available on a dedicated IC such as the 4043.

The 4043 IC contains four separate bistables each with a SET, a RESET and a single output. As shown in the pin layout, only output Q is available - there is no Q output.

SET is normally LOW, making SET go HIGH forces the output Q HIGH. RESET is normally LOW, making RESET go HIGH forces the output Q LOW. Making both SET and RESET HIGH at the same time is a disallowed state - in this case the output Q goes HIGH with the final state being determined by which input goes LOW first.

The 4043 IC also has an ENABLE input. This input controls the tristate output of all four bistables together. When the ENABLE is HIGH, the outputs of each bistable are either HIGH or LOW as expected. When the enable is LOW the outputs are not connected to the bistables and simply float to any value. A simple test circuit is shown with the ENABLE connected HIGH and two inputs provided by push buttons.

### Using 4013 as a Bistable A bistable can easily be built from a 4013 D-type flip-flop IC. The 4013 has a SET and RESET as expected and also has outputs Q and Q making it preferable to the 4043 IC in some cases. There are two other inputs called CLOCK (Ck) and DATA (D) that are not used and must be connected to ground when the 4013 is used as a simple bistable. The 4013 IC contains two separate flip-flops and so can be used to provide two separate bistables that operate completely independently.

SET is normally LOW, making SET go HIGH forces the output Q HIGH and Q LOW. RESET is normally LOW, making RESET go HIGH forces the output Q LOW and Q HIGH. Making both SET and RESET HIGH at the same time is a disallowed state - in this case the outputs Q and Q both go HIGH with the final state being determined by which input goes LOW first. A simple bistable circuit using a 4013 D-type flip-flop with Clock and Data connected to ground and two output LEDs.

### Simple logic gate Bistable At the heart of a bistable circuit are two inverting logic gates. The output of each logic gate is connected to the input of the other logic gate. Such a circuit has two states where it is stable. The most basic logic gate bistable is made from two NOT gates as shown in the diagram.

Situation 1: Assume A = 0 and therefore B = 1. B = 1 and therefore C = 0 ... but C is connected to A and so A = 0 as required.

Situation 2: Assume A = 1 and therefore B = 0. B = 0 and therefore C = 1 ... but C is connected to A and so A = 1 as required.

Whether A = 0 or A = 1, the circuit works in both cases. To make this circuit a bistable simply make one of the NOT gate outputs Q and the other Q

This is not a good circuit. To SET or RESET the bistable requires input A or input B to be forced into either a HIGH or LOW state - but the inputs are also the outputs of the other logic gates and forcing the outputs of logic gates to be either HIGH or LOW can lead to problems. If we assume situation 1 where A = 0 and we force A to be HIGH so that A = 1 then the output C will try and stay LOW so is A HIGH or LOW? An indeterminate state can result and the bistable will either fail to work or be unreliable or, in the worst case scenario, the logic gates will be damaged by having their outputs forced HIGH or LOW. All together not good.

Interactive White Board explanation: video

### NOR gate Bistable Consider the function of the NOR gate. When A = 0 (as shown circled in red) then the NOR gate acts like a NOT gate with B and Q being opposite in both cases. Therefore the NOR gate can replace the NOT gate in the simple logic bistable. However, when A = 1, Q = 0 irrespective of the state of B therefore A is acting like a RESET. This is an excellent bistable circuit. When SET and RESET are both LOW the NOR gates act as NOT gates and the bistable has two stable states. SET and RESET can safely be made HIGH as they are not directly connected to the output of the NOR gates - they are only inputs.

Situation 1: Consider SET = 0, RESET = 0, Q = 0 and therefore Q = 1. Making SET = 1 forces Q = 0. Both inputs to the right hand NOR gate are now LOW and so Q = 1. The feedback ensures that at least one of the inputs of the left hand NOR gate is now HIGH and so = 0. Therefore, making SET = 1 forces Q = 1 as required.

Situation 2: Consider SET = 0, RESET = 0, Q = 1 and therefore Q = 0. Making RESET = 1 forces Q = 0. Both inputs to the left hand NOR gate are now LOW and so Q = 1. The feedback ensures that at least one of the inputs of the right hand NOR gate is now HIGH and so Q = 0. Therefore, making RESET = 1 forces Q = 0 as required.

Logic circuits or devices where the inputs are normally LOW and go HIGH to make something happen are often referred to as having "NOR gate logic" or "NOR logic" because in the NOR gate bistable SET and RESET are normally LOW. Note that the 4043 and 4013 ICs employ NOR gate logic.

Interactive White Board explanation: video

### NAND gate Bistable Consider the function of the NAND gate. When A = 1 (as shown circled in red) then the NAND gate acts like a NOT gate with B and Q being opposite in both cases. Therefore the NAND gate can replace the NOT gate in the simple logic bistable if A is held HIGH. However, when A = 0, Q = 1 irrespective of the state of B therefore A is acting like a SET. When SET and RESET are both HIGH the NAND gates act as NOT gates and the bistable has two stable states as before. SET and RESET can safely be made LOW as they are not directly connected to the output of the NAND gates - they are only inputs. Note that in this case the SET and RESET inputs are normally HIGH and must go LOW to cause a change to happen - this type of logic is called "NAND gate logic" or "NAND logic". Having the normal state of the inputs as HIGH does not seem obvious at first but this is very similar to the monostable circuit where the trigger is held HIGH and goes LOW to start the monostable. NAND gate logic is quite common in more advanced digital circuits.

Situation 1: Consider SET = 1, RESET = 1, Q = 0 and therefore Q = 1. Making SET = 0 forces Q = 1. Both inputs to the left hand NAND gate are now HIGH and so Q = 0. The feedback ensures that at least one of the inputs of the right hand NAND gate is now LOW and so Q = 1. Therefore, making SET = 0 forces Q = 1 as required.

Situation 2: Consider SET = 1, RESET = 1, Q = 1 and therefore Q = 0. Making RESET = 0 forces Q = 1. Both inputs to the right hand NAND gate are now HIGH and so Q = 0. The feedback ensures that at least one of the inputs of the right hand NAND gate is now LOW and so Q = 1. Therefore, making RESET = 0 forces Q = 0 as required.

The 4044 IC is functionally equivalent to the 4043 described above except that it uses NAND logic and the pin layout is slightly different.

Interactive White Board explanation: video

### Alternative representations

The NOR gate bistable and NAND gate bistable circuits shown below - with suitable inputs and outputs - are equivalent to the circuits described above but they are drawn differently. You have to convince yourself they are the same circuit! Pull down resistors ensure SET and RESET are normally LOW and go HIGH when the buttons are pressed (NOR Logic). Pull up resistors ensure SET and RESET are normally HIGH and go LOW when the buttons are pressed (NAND Logic).